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10. User Interface
Table 10-1.
Register Mapping
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0C
0x10
0x11
Register
DAC_CTRL
DAC_LLIG
DAC_RLIG
DAC_LMPG
DAC_RMPG
DAC_LLOG
DAC_RLOG
DAC_OLC
DAC_MC
DAC_CSFC
DAC_MISC
DAC_PRECH
DAC_RST
PA_CRTL
Name
DAC Control
DAC Left Line In Gain
DAC Right Line In Gain
DAC Left Master Playback Gain
DAC Right Master Playback Gain
DAC Left Line Out Gain
DAC Right Line Out Gain
DAC Output Level Control
DAC Mixer Control
DAC Clock and Sampling Frequency
Control
DAC Miscellaneous
DAC Precharge Control
DAC Reset
Power Amplifier Control
Access
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Reset State
0x00
0x05
0x05
0x08
0x08
0x00
0x00
0x22
0x09
0x00
0x00
0x00
0x00
0x0F
Note:
MSB = Bit 7, LSB = Bit 0
16
AT73C240
6464A–PMAAC–28-Apr-09
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